IPC J-STDE, Requirements for Soldered Electrical and Electronic Assemblies released, updated for all three classes of construction. Requirements for. Soldered Electrical and Electronic. Assemblies. IPC J-STD- E April Supersedes Revision D February IPC J-STDE April Supersedes Revision D February JOINT INDUSTRY STANDARD Requirements for. Soldered Electrical and Electronic.

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Insulating material needs to provide sufficient electrical isolation. Components shall not [] he charred Note: Three face termination 8.

J-STD-001E: Requirements for Soldered Electrical and Electronic Assemblies

Table 1 of this standard is to be used for printed circ uit assemblies. Before acceptance criteria can be devel oped there needs to be significant use so js-td a history of failure data can k-std captured from mu ltiple users. If present on ends, toe curl should not exceed two times lhe thickness of the lead 7.

S wrapped more Ihan and remains in conlacl w? Wetting is evidenl Note 5: A documented aud it plan is defined to monitor process characteristics an dJor output al a prescribed frequency g.

Wh en soldering these types of components voiding i n the thermal plane i s common Notc: This c1 ause does nol app ly to sleeved glass bodied axial leaded components see lO. See Note 4, Table 8.

Not negate stress 0001e If no criteria is specifiedrequiredor citedthen best manufacturing practice applies. Solder connections to components having cy lindrical end cap terminations shall [] meet the dimensional and solder fillet requirements of Table and Figure for each product classification Table Feature Maximum Side Overhang End Overhang Minimum End Joi nt Width.

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Li ne bisecting lower bend 3. Fine pilch leads componenllerminalions on less Ihan 0. The shank of the terminal shall not [DID2D3] be perforated nor splitcrackedor otherwise damaged to the extenr that oilsfluxinksor other liquid substances utilized for processing the printed board can be entrapped within the mounting hole 5.

There shall [AIP] be positive contact o f the wire jstd ith at least one corner of the post Figure and shall [] meet the requirements of Table Lead and wire ends may ex tend beyond the base of j-srd provided the minimum electrical clearance is maintained.

IPC J-STDE_图文_百度文库

Absence of leads, e. Under-fill or staking material Note1: Solder connections meet the criteria 01 4. Dimensions of masked areas shall not [DID2D3] be decreased in lengthwidthor diameter by more than 0.

Pe rcentage 01 land area covered w ith wetted solder. When another test method or ftux is used see 3. Contain simple simplified language?

J-STDE: Requirements for Soldered Electrical and Electronic Assemblies

The solder shall [NID2D3] wet the tinned portion of the wire and sho uld penetrate to the inner strands of the wire Solder build-up or ici c1 es within the tinned wire area shall not [DID2D3] affect subsequent assembly steps Stranded wires shall not [DID2D3] be tinned when a. In the absence of a specified cleanliness designa tor, the designalor C as described in the following paragraphs and the visual requ ireme nts for c1 n-std ness shall [] apply Note: C is measured from the narrowest point of Ihe solder fil!

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End joint width 6. Plane Void Criteria Note 6 Note1: As a function of the component designthe lermination may not extend 10 Ihe component edgeand the componenl body may overhang Ihe PCB land j-srd. Paragraph and table numbers 3re from IPC Li ght ranges from 0 K enable users to distinguish various printed circuit assembly features and contaminates with increased clarity 4.

Once parts are mounted on printed boards, the unsoldered assembly shall [] be handledtranspOJ1ed e. Notes 2 j-shd an d Figu re Circu mferential wetting of lead and barrel on sol der desti nation side Percentage of original land area covered with wetted solder on sold er destination side.

Notes 1, 2 Voids Required underfill or staking material is present and completely cured. The top of the lead should not extend beyond the top of the component body, except for preformed stress loops e.